Embedded JTAG Solutions (Boundary Scan)
Since the introduction of the 1149.1 standard in 1990, GOEPEL electronics has been working on hardware and software solutions that use the JTAG interface to test board connections and functions.
Over the years, further expansions of the standard and test technologies were added, which are now summarized under the term Embedded JTAG Solutions.
JTAG/Boundary Scan (Standard IEEE 1149.1) is possibly the most resourceful test access technique around. Similar to In-Circuit Test (ICT), but without physical bed of-nail adapters, it detects structural fault locations by utilising thousands of test points - with only four test bus lines.
Based on the JTAG/Boundary Scan test technology several tests can be generated automatically by a Boundary Scan Test System after the import of the CAD data of the board. Of course, also manually written tests could be added to further improve the test coverage.